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 AP2307N
Advanced Power Electronics Corp.
Simple Drive Requirement Small Package Outline Surface Mount Device
S D
P-CHANNEL ENHANCEMENT MODE POWER MOSFET
BVDSS RDS(ON) ID
-16V 60m - 4A
Description
SOT-23
G
D
The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, , low on-resistance and cost-effectiveness. The SOT-23 package is universally preferred for all commercialindustrial surface mount applications and suited for low voltage applications such as DC/DC converters.
G S
Absolute Maximum Ratings
Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current
1 3 3
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Parameter
Rating -16 8 -4 -3.3 -12 1.38 0.01 -55 to 150 -55 to 150
Units V V A A A W W/
Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range
Thermal Data
Symbol Rthj-a Parameter Thermal Resistance Junction-ambient
3
Value Max. 90
Unit /W
Data and specifications subject to change without notice
200414041
AP2307N
Electrical Characteristics@Tj=25oC(unless otherwise specified)
Symbol BVDSS
BVDSS/Tj
Parameter Drain-Source Breakdown Voltage Static Drain-Source On-Resistance2
Test Conditions VGS=0V, ID=-250uA
Min. -16 -
Typ. -0.01 12 15 1.3 4 8 11 54 36 985 180 160
Max. Units 60 70 90 -1.0 -1 -25 100 24 1580 V V/ m m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
Breakdown Voltage Temperature Coefficient Reference to 25, ID=-1mA
RDS(ON)
VGS=-4.5V, ID=-4A VGS=-2.5V, ID=-3.0A VGS=-1.8V, ID=-2.0A
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C)
o o
VDS=VGS, ID=-250uA VDS=-5V, ID=-4A VDS=-16V, VGS=0V VDS=-12V, VGS=0V VGS=8V ID=-4A VDS=-12V VGS=-4.5V VDS=-10V ID=-1A RG=3.3,VGS=-10V RD=10 VGS=0V VDS=-15V f=1.0MHz
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
Source-Drain Diode
Symbol VSD trr Qrr Parameter Forward On Voltage
2 2
Test Conditions IS=-1.2A, VGS=0V IS=-4A, VGS=0V, dI/dt=100A/s
Min. -
Typ. 39 26
Max. Units -1.2 V ns nC
Reverse Recovery Time
Reverse Recovery Charge
Notes:
1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 270/W when mounted on min. copper pad.
AP2307N
16 14
14
T A =25 C
o
-ID , Drain Current (A)
ID , Drain Current (A)
12
-5.0V -4.5V -3.0V -2.5V V G = - 1.8 V
T A = 150 o C
12
10
-5.0V -4.5V -3.0V -2.5V V G = - 1.8 V
10
8
8
6
6
4
4
2
2
0 0 1 2 3 4 5 6
0 0 2 4 6 8
-V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
70
1.6
I D =-3A T A =25 o C
60
1.4
ID= -4A V G = -4.5V
Normalized RDS(ON)
1 3 5 7 9
RDS(ON) ( )
1.2
1.0
50
0.8
40
0.6 -50 0 50 100 150
-V GS , Gate-to-Source Voltage (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance v.s. Junction Temperature
2.0
3
1.5
2
T j =150 o C
1
T j =25 o C
Normalized -VGS(th) (V)
1
-IS(A)
1.0
0.5
0
0.0 0 0.2 0.4 0.6 0.8
-50 0 50 100 150
-V SD , Source-to-Drain Voltage (V)
T j , Junction Temperature ( o C)
Fig 5. Forward Characteristic of
Reverse Diode
Fig 6. Gate Threshold Voltage v.s. Junction Temperature
AP2307N
8 10000
f=1.0MHz
-VGS , Gate to Source Voltage (V)
I D =-4A V DS =-16V
6
C (pF)
4
1000
C iss
2
C oss C rss
0 100
0
8
16
24
32
1
5
9
13
17
Q G , Total Gate Charge (nC)
-V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100.00
1
Duty factor=0.5
Normalized Thermal Response (Rthja)
0.2
10.00
0.1
0.1
1ms -ID (A)
1.00
0.05
0.01
PDM t T
Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja = 270/W
10ms 100ms
0.10
0.01
Single Pulse
T A =25 C Single Pulse
0.01 0.1 1 10
o
1s DC
100
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
-V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
VDS 90%
VG QG -4.5V QGS QGD
10% VGS td(on) tr td(off) tf Charge Q
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform


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